1. Field of the Invention
The present invention relates to a tape carrier, semiconductor assembly, and semiconductor device, to methods of manufacture thereof, and to an electronic instrument.
2. Related Art
There is no formal definition for a multi-chip module (hereafter abbreviated as xe2x80x9cMCMxe2x80x9d), but generally it is interpreted as a module having a plurality of chips on a substrate. To facilitate high-density mounting, the development of MCM technology is very important.
A prior example of an MCM using a flexible substrate is disclosed in Japanese Patent Application Laid-Open No. 7-120772. In this MCM each of a plurality of chips in parallel has a plurality of wires, and each wire has a test pad formed. The test pad is formed to be larger than the wire.
In this construction, when the chips are disposed at high density, in order that the plurality of wires can be made in a narrow space, and the test pads which is larger than the wires can be connected, the lead-out pattern of wires is different for each chip. For this reason, the test pad design pattern is different, and it is not possible to use the same test probe card repeatedly for each chip. There is a further problem in that since test probe cards supporting a plurality of chips must be used, the test equipment is complicated and expensive, or the number of probes must be increased and the test probe card becomes more expensive.
The object of the present invention is the provision of a tape carrier, semiconductor assembly, and semiconductor device, methods of manufacture thereof, and an electronic instrument, such that using existing test equipment as far as possible, the burden of equipment and special technology development can be lightened, and an inexpensive test probe card used without increasing the number of probes.
(1) The tape carrier of the present invention has a substrate in a tape form on which are arrayed a plurality of semiconductor elements in a longitudinal direction;
a first pattern extending in a first direction along a width of the substrate; and
a second pattern extending in a second direction along the width of the substrate, each of the first and second patterns comprising an array of a plurality of wires having bonding portions with the semiconductor elements, external terminal portions connected to the bonding portions, and lead-out portions lead outward from the external terminal portions, and in at least one of the first and second patterns, the wires divided into a plurality of groups, and ends of lead-out portions of the wires in each of the groups disposed in a particular pattern corresponding to probes for test.
According to an aspect of the present invention, since the ends of lead-out portions of wires forming a group are disposed in a particular pattern, the same test probe card can be used when probes are contacted with these ends. This construction is a tape carrier with a pattern formed on a substrate, and as far as possible a conventional TAB (Tape Automated Bonding) production line and existing technology can be used, reducing the burden of equipment and special technology development. Moreover, by repeating testing of the pattern of the tape carrier (functioning as a part of the final product (MCM)) using the ends of the lead-out portions, the whole tape carrier can be tested. In this way, since test equipment in existing processes can be utilized, with no extra investment in equipment, the tape carrier for the MCM with a plurality of semiconductor elements mounted can be tested, and an inexpensive MCM tape carrier can be obtained.
(2) In this tape carrier, the wires in each of the groups may become shorter in sequence of their array from outside one to center one.
According to this construction, since the length of the wires becomes shorter from the outside to the center, the positions of the ends of adjacent lead-out portions are varied. By means of this, the spacing between adjacent lead-out portions is increased, and inexpensive probes of coarse pitch can be used, allowing the cost of inspection to be reduced.
(3) In this tape carrier, the wires in each of the groups may be formed in a given repeating pattern.
According to this construction, when the pattern is formed by lithography, the same mask can be used repeatedly, and therefore the mask design and fabrication processes and inspection operation can be made more efficient.
(4) In this tape carrier, each of the ends of the lead-out portions of the wires in each of the groups may be in a form of a test pad.
(5) In this tape carrier, the external terminal portions of the wires in each of the groups may be formed with the same pitch.
According to this construction, the connection to the external portions of the MCM can be formed at the same pitch. By means of external terminal portions of the same pitch, it is made easier to detect formation faults in the inspection process.
(6) In this tape carrier, in only one of the first and second patterns, the wires may form the plurality of groups, and the wires in another of the first and second patterns may be fewer in number than the wires in the one of the first and second patterns.
(7) The semiconductor assembly of the present invention includes a plurality of semiconductor elements having a plurality of electrodes; and
a tape carrier on which the semiconductor elements are arrayed in a longitudinal direction, the tape carrier having a substrate, a first pattern extending in a first direction along a width of the substrate, and a second pattern extending in a second direction along the width of the substrate, each of the first and second patterns having an array of a plurality of wires including bonding portions connected to the semiconductor elements, external terminal portions connected to the bonding portions, and lead-out portions lead outward from the external terminal portions, and in at least one of the first and second patterns, the wires divided into a plurality of groups, and ends of the lead-out portions of the wires in each of the groups disposed in a particular pattern corresponding to probes for test.
According to this construction, when inspection is carried out using the ends of the lead-out portions of the wires of each group, since these ends are disposed in a particular pattern, the inspection process is very greatly simplified. Then, by simply repeating the inspection process for the whole semiconductor device (MCM), since the MCM is a collection of repeating individual semiconductor elements, the whole MCM can be inspected.
Furthermore, the test equipment used for testing the tape carrier can be used for the test equipment for testing by contacting probes with the ends of the lead-out portions. This means that test equipment in an existing process can be utilized, and thus no extra investment in test equipment is required for testing the semiconductor assembly, and as a result an inexpensive semiconductor assembly can be obtained.
(8) In this semiconductor assembly, the wires in each of the groups may be connected to one of the semiconductor elements.
By means of this, by carrying out testing in a repeated manner using the ends of the lead-out portions of the wires for each individual semiconductor element, the whole semiconductor assembly can be inspected.
(9) In this semiconductor assembly, the semiconductor elements may be mounted with their surfaces having the electrodes facing the bonding portions.
According to this construction, since the semiconductor elements are mounted in the face-down orientation, the semiconductor element electrodes can be connected to the pattern with the minimum intervening distance. The result of this is that the inductance is low, and a semiconductor assembly of excellent high frequency characteristics can be obtained. Furthermore, compared with the wire bonding and other such methods of mounting, the very thinnest result can be obtained.
(10) In this semiconductor assembly, the electrodes of the semiconductor elements may be connected facing the bonding portions, and a resin may be disposed between the surface having the electrodes and the substrate.
According to this construction, the pattern formed on the substrate and the surface of the semiconductor elements having the electrodes are covered by a resin, and thus the ingress of water is eliminated and the reliability is improved. Further, since the semiconductor element and substrate are unified by the resin, damage to the bonding portions caused by thermal stress in the heat cycle is kept to a minimum, and the reliability is improved.
According to this construction, since the semiconductor elements are mounted in the face-down orientation, the semiconductor element electrodes are connected to the pattern with the minimum intervening distance. Thus the inductance is low, and a semiconductor assembly of excellent high frequency characteristics can be obtained. Furthermore, compared with the wire bonding and other such methods of mounting, the very thinnest result can be obtained.
(11) The semiconductor device of the present invention comprises a plurality of semiconductor elements having a plurality of electrodes;
a substrate in a tape form on which are arrayed the semiconductor elements in a longitudinal direction;
a first pattern extending in a first direction along a width of the substrate; and
a second pattern extending in a second direction along the width of the substrate, each of the first and second patterns including an array of a plurality of wires having bonding portions connected to the semiconductor elements, and external terminal portions connected to the bonding portions, in one of the first and second patterns the wires are formed more in number than in another of the first and second patterns, and in at least the one of the first and second patterns in which the wires are formed more in number, the external terminal portions are formed with a same pitch, and ends thereof are coplanar with a side edge of the substrate.
(12) The semiconductor device of the present invention may be obtained from the semiconductor assembly described above, by cutting off and removing at least ones of the lead-out portions of the wires forming the groups together with the substrate.
This construction yields a semiconductor device in which after completing inspection of the semiconductor assembly, then only good items are selected and taken to the final form. Since the lead-out portions are cut off and removed, the external terminal portions are positioned at the external edge of the final product.
(13) The electronic instrument of the present invention has the above-mentioned semiconductor device.
(14) The method of fabricating a tape carrier of the present invention comprises a first step of forming a first pattern extending in a first direction along a width of the substrate and a second pattern extending in a second lateral direction along the width, on a substrate in a tape form; and
a second step of inspecting the first and second patterns, each of the first and second patterns including an array of a plurality of wires having bonding portions with the semiconductor elements, external terminal portions connected to the bonding portions, and lead-out portions lead outward from the external terminal portions, in at least one of the first and second patterns, the wires divided into a plurality of groups, and ends of the lead-out portions of wires in each of the groups disposed in a particular pattern corresponding to probes for test, and the second step including an inspection in which the probes are disposed to correspond to the particular pattern, and the probes are simultaneously put on the ends of the lead-out portions disposed in the particular pattern.
By this method, the tape carrier described above can be obtained.
(15) The method of fabricating a semiconductor assembly of the present invention comprises a first step of mounting a plurality of semiconductor elements having a plurality of electrodes on a tape carrier; and
a second step of inspecting the semiconductor elements, the tape carrier comprising a substrate, a first pattern extending in a first direction along a width of the substrate, and a second pattern extending in a second direction along the width of the substrate, each of the first and second patterns including an array of a plurality of wires having bonding portions connected to the semiconductor elements, external terminal portions connected to the bonding portions, and lead-out portions lead outward from the external terminal portions, and in at least one of the first and second patterns, the wires divided into a plurality of groups, and ends of lead-out portions of the wires in each of the groups disposed in a particular pattern corresponding to probes for test, and the second step including an inspection in which the probes are disposed to correspond to the particular pattern, and the probes are simultaneously put on the ends of the lead-out portions of the wires disposed in the particular pattern.
By this method, the semiconductor assembly described above can be obtained.
(16) In this method of fabricating a semiconductor assembly, in the first step, surfaces of the semiconductor elements having the electrodes may face the bonding portions so that the electrodes and the bonding portions may be positioned before the connection is made.
(17) In this method of fabricating a semiconductor assembly, the wires in each of the groups may be connected to one of the semiconductor element; and the second step may be carried out once for each semiconductor element.
(18) This method of fabricating a semiconductor assembly may further comprise: a step in which faulty ones of the semiconductor elements discovered in the second step are replaced by good ones.
(19) This method of fabricating a semiconductor assembly may further comprise: a step in which after confirming that all semiconductor elements are good, a resin is injected between the surface of the semiconductor elements having the electrodes and the substrate, and the resin is cured.
According to this method, the semiconductor elements are inspected, and then faulty semiconductor elements are replaced with good ones as required, and then a resin is injected. Therefore, particularly in a face-down mounting method in which replacing faulty semiconductor elements is difficult after the resin has been cured, the proportion of good semiconductor assemblies can be increased. Furthermore the fabrication cost of the semiconductor devices can be reduced.
(20) The method of fabricating a semiconductor device of the present invention comprises a first step of mounting a plurality of semiconductor elements having a plurality of electrodes on a tape carrier;
a second step of inspecting the semiconductor elements, the tape carrier comprising a substrate, a first pattern extending in a first direction along a width of the substrate, and a second pattern extending in a second direction along the width of the substrate, each of the first and second patterns including an array of a plurality of wires having bonding portions with the semiconductor elements, external terminal portions connected to the bonding portions, and lead-out portions lead outward from the external terminal portions, and in at least one of the first and second patterns, the wires divided into a plurality of groups, and ends of lead-out portions of the wires in each of the groups disposed in a particular pattern corresponding to probes for test, and the second step including an inspection in which the probes are disposed to correspond to the particular pattern, and the probes are simultaneously put on the ends of the lead-out portions disposed in the particular pattern; and
a third step in which at least the lead-out portions of the wires forming the groups are cut off and removed together with the substrate.
According to this method, since the lead-out portions are cut off and removed, the external terminal portions are positioned at the edge of the final product. Further, according to this method, since the inspection of the semiconductor elements is completed, the proportion of good semiconductor devices being produced can be very greatly increased, and product cost of the semiconductor device can be reduced.
(21) The method of fabricating a semiconductor device of the present invention comprises a step of fabricating a semiconductor assembly by the method described above, and cutting off and removing at least the lead-out portions of the wires forming the group together with the substrate.
This method yields a semiconductor device in which after completing inspection of the semiconductor assembly, only good items are selected and taken to the final form. Since the lead-out portions are cut off and removed, the external terminal portions are positioned at the edge of the final product. Since the inspection is completed at the semiconductor assembly stage, the proportion of good semiconductor devices can be greatly increased, and the semiconductor device product cost can be reduced.